Turbo-product codes (TPC) are a type of error correction codes. During TPC encoding, payload information is arranged in a matrix, and a TPC encoder encodes the rows and columns using component codes. For example, the rows are grouped in some manner (e.g., each group is 1-bit “high”) and encoded. Then, the columns are grouped in some manner (e.g., each group is 1-bit “wide”) and encoded. On the decoder side, the data is accessed multiple times from a data memory buffer for row decoding and column decoding. The overhead for accessing this huge amount of data from the data memory buffer is significant. An efficient architecture which can overcome this bottleneck would be desirable.